Setting Of Output Pulse Frequency (Dvit, Plsv, Drvi, And Drva Instructions - Mitsubishi Electric FX3S Series User Manual

FX /FX /FX
3S 3G 3GC
Built-in Positioning Functions
4.2.2

Setting of Output Pulse Frequency (DVIT, PLSV, DRVI, and DRVA Instructions)

Set the output pulse frequency using the operand of each instruction. In this case, the setting range depends
on the instruction (see the following table).
However, even in the setting range of each instruction, if the set value of the output pulse frequency is more
than the maximum speed value, the operation will be performed at the maximum speed. If the set value of the
output pulse frequency is less than the bias speed value, the operation will be performed at the bias speed.
Instruction Operand
DVIT
instruction
PLSV
instruction
DRVI
instruction
DRVA
instruction
*1.
*2.
*3.
Caution:
• To use the main unit (transistor output), set the output pulse frequency (absolute value) to 100,000 Hz or less.
If more than 100,000 Hz is output from the transistor output of the main unit to perform operation, it may cause PLC
failure.
• Set the output pulse frequency so that the output pulse frequency value is less than the maximum frequency value
of the servo amplifier (driver unit).
B - 52
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3U 3UC
Setting range
16-bit operation
(Hz)
10 to 32767
S
2
*3
-32768 to -1,
S
+1 to 32767
10 to 32767
S
2
10 to 32767
S
2
If FX -2HSY-ADP is not used, note that the frequency value cannot be more than 100,000 Hz.
3U
If FX -2HSY-ADP is not used, note that the frequency value cannot be less than -100,000 Hz.
3U
Only available for FX /FX
3U
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For operation of DVIT instruction, refer to Chapter 9.
For operation of PLSV instruction, refer to Chapter 10.
For operation of DRVI or DRVA instruction, refer to Chapter 8.
32-bit operation
(Hz)
*1
10 to 200,000
*2
-200,000 to -1,
*1
+1 to 200,000
*1
10 to 200,000
*1
10 to 200,000
PLCs.
3UC
4 Before Programming
4.2 Setting of Various Items Regarding Speeds
Instruction format
• • •
DVIT S S D
1 2 1
•
PLSV S• D
1
• • •
DRVI S S D
1 2 1
• • •
DRVA S S D
1 2 1
•
D
2
•
D
2
•
D
2
•
D
2