Part 4.5: Video Input Interface - Xilinx AV6045 User Manual

Fpga video processing development platform
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Part 4.5: Video input interface

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PAL/NTSC/SECAM automatic identification, output BT656, multiplexable bus,
FPGA-side demultiplexing, save IO
Among them, the IIC interface and reset pin of TW2867 are connected to
STM32F103, and the TW2867 is initialized and controlled by STM32F103.
Other pins are connected to FPGA.
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FPGA Video Processing Development Platform AV6045 User Manual
9013_D[14]
9013_D[15]
9013_D[16]
9013_D[17]
9013_D[18]
9013_D[19]
9013_D[20]
9013_D[21]
9013_D[22]
9013_D[23]
TW2867,
Contact Email: rachel.zhou@alinx.com.cn
input
4
composite
AB15
R11
AA16
T11
W14
V13
W15
Y14
Y16
AB16
video
signals,

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