Part 4.9: Expansion Header - Xilinx AV6045 User Manual

The following table shows the FPGA pin assignments for connecting 5
million CMOS cameras (AN5640 modules):
CMOS_VSYNC
CMOS_RESET
CMOS_PWDN

Part 4.9: Expansion Header

The carrier board is reserved with one 0.1inch spacing standard 40-pin
expansion header J13 which is used to connect the ALINX modules or the
external circuit designed by the user. The expansion port has 40 signals, of
which 1-channel 5V power supply, 2-channel 3.3 V power supply, 3-channle
ground and 34 IOs.
to avoid burning the FPGA. If you want to connect 5V equipment, you
need to connect level conversion chip.
A 33 ohm resistor is connected in series between the expansion port and
the FPGA connection to protect the FPGA from external voltage or current. The
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FPGA Video Processing Development Platform AV6045 User Manual
Pin Name
CMOS_SCLK
CMOS_SDAT
CMOS_HREF
CMOS_PCLK
CMOS_XCLK
CMOS_D[7]
CMOS_D[6]
CMOS_D[5]
CMOS_D[4]
CMOS_D[3]
CMOS_D[2]
CMOS_D[1]
CMOS_D[0]
Do not directly connect the IO directly to the 5V device
Contact Email: rachel.zhou@alinx.com.cn
FPGA Pin
AB5
Y5
AA4
AB3
AB4
Y3
V9
U9
W6
AB6
Y11
AB11
Y6
AA6
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