Xilinx AV6045 User Manual page 26

Fpga video processing development platform
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The schematic diagram of the four user LED sections is shown below. In
Figure 3-8-3, When the FPGA pin output is logic 0, the LED will be lit.
User LEDs Pin Assignment
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FPGA Video Processing Development Platform AV6045 User Manual
Figure 3-8-3: User LED Schemaitc
Figure 3-8-4: User LED on the Core Board
LED Name
LED0
LED1
LED2
LED3
Contact Email: rachel.zhou@alinx.com.cn
FPGA Pin
U6
V5
AA2
AB2

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