Open-Q™ 820 (APQ8096) / 820Pro (APQ8096SG) µSOM Development Kit User Guide Version 1.4
CSI PHY
CSI0 + CSI1
CSI 2
CSI0 + CSI1 + CSI2
CPHY
3.8.21 Power Header via 20 Pin Connector J60
• For providing camera connectors with additional current than what is originally
supported by on board regulators. This is to mitigate the effect of high resistance and
IR drop on flat cables which can violate camera sensor requirements for high
performance cameras
• It is recommended to use this when high performance (high mega pixels) cameras are
being used. Usually high-performance cameras require more power
• Can also be used as a general power header if user would like to use voltage rails
brought out by connector
Description
1.05V
MB_ELDO_CAM0_DVDD
power rail
for camera
0
2.8V power
VREG_L23A_2P8
rail for
camera 0, 2
(VDD)
Use case
Up to 4 lane 3D
4 lane 3D use case / Dual 4 lane configuration
Up to 1 lane 3D
1 lane 3D use case / Dual 1 lane configuration
Up to 4 lane
Three 4-lane CSI (4+4+4 or 4+4+2+1)
Three 3-trio CPHY1.0
Figure 25 J60 Power Connector
Signal
Pin NO
J60[1]
J60[3]
Copyright Intrinsyc Technologies Corporation
Comment
Description
2.85V power
VREG_L17A_2P8
rail for
camera 0
(AVDD)
GND
GND
45
Signal
Pin NO
J60[2]
J60[4]
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