System Block Diagram - Intrinsyc Open-Q 670 HDK User Manual

Open-Q™ 670 HDK Hardware Development Kit User Guide Version 1.0

3.6 System Block Diagram

The following diagram explains the interconnectivity and peripherals on the development kit.
The following diagram explains the interconnectivity and peripherals on the development kit.
HDMI
LT9611
HDMI
TypeA
Display Adaptor Card
QCT801S 5.65" TFT
FHD+
Improve touch
RCM
Sensor Test Card
Accel/Gyro
Humidity Magneto
UV ALS/Proximity
Gas Pressure
Hall
RCM
Dual Camera card Single Camera card
(10-PB804-1) (10-P6679-3)
OV12A10 Rear IMX318
CSI0 CSI0
OV12880
CSI1
Front IMX258
CSI2
Micro SD
Type C
USB to UART
Micro B
Figure 3-3 Open-Q 670 HDK Processor board + Carrier Board Block Diagram
8.6Gbps per port
DPHY
B2B DSI
1x 4lanes
Switch
I2C
SPI
SPI
SPI
I2C
1x 4lanes
1x 4lanes
1x 4lanes
I2C
I2C
uMCP
Universal
Flash
Storage
LPDDR4x
eMMC
eMCP eMCP
4bit eMMC5.1
USB3.1+DP
UART
Bridge
RCM
Copyright Intrinsyc Technologies Corporation
Carrier Board (1-6-1)
Baseband Daughter Card (2-6-2)
B2B
SDA670
SPMI
CXO CXO
DSI0
RESIN_N PON_RESET_N
QUP9
QUP10
SSC_SPI2
TX/RX 2xI/Q
WCSS
WCSS1 WLAN_CH0 CNTRL
SSC_SPI1
WCSS2 WLAN_CH1 CNTRL
WCI2
SSC_I2C1
QUP6 BT/FM HCI UART
SSC_UART1
Kryo CPU
SLIMBUS BT/FM Audio
GPIO_124 2xGold 2.0GHz
QUP0
6xSilver 1.7GHz
QUP3
Flash_LED1
Flash_LED2
Adreno 615,
512KB GMEM
CSI0
UIM1
UIM2_QUP13
CSI1
HEXAGON
V65 DSP
CSI2
Sensor Core
share w/
ADSP/LPASS
CCI0
Adrastea WLAN
Module
CCI1
2x2, 11ac,
VHT160, DBS
SLIMbus
UFS1_L0
GPS Izat Gen9 QUP8
LPDDR4x
2x16bit
6Gbps per lane
SDC1
QLINK QLINK(1Tx/3Rx)
RFFE1 clk/data
SDC2
USB0_SS
JTAG
USB1_SS
USB_HS
GPIO
QUP12
GPIO
B2B
10
/RGB
LEDs
PM670L Vol+
Vol- (RESIN_N)
PM670 38.4
Power
HVDCP 3200mAh
SMB1355
WCN3990
Coax
(WLAN/BT)
Via Analog I/Q
Coax
NFC expansion
UIM
WCD9341
(Audio Codec)
SoundWire clk/data
LNA
WWAN
Coax.
(SDR660)
JTAG
JTAG expansion
JTAG
General Config(S2302)
Boot Config(S2301)
Wifi
Channel 0
Wifi
Channel 1
Audio Test Card
DMIC X4
WSA8815
Spkr Amps
Speaker
12ohm
Receiver
DNI
GNSS
0ohm