Intrinsyc Open-Q 670 HDK User Manual page 13

Open-Q™ 670 HDK Hardware Development Kit User Guide Version 1.0
8.6Gbps per port
DPHY
1x 4lanes
I2C
SPI
SPI
I2C
GPIO
Flash_LED1
Flash_LED2
1x 4lanes
1x 4lanes
1x 4lanes
I2C
I2C
uMCP
Universal
Flash
Storage
LPDDR4x
eMMC
eMCP
eMCP
4bit eMMC5.1
USB3.1+DP
UART
RCM
Figure 3-5 Open-Q 670 Processor Board Block Diagram
Baseband Daughter Card (2-6-2)
B2B
SDA670
DSI0
QUP9
SSC_SPI2
SSC_SPI1
SSC_I2C1
Kryo CPU
2xGold 2.0GHz
GPIO_124
6xSilver 1.7GHz
Adreno 615,
512KB GMEM
CSI0
CSI1
HEXAGON
V65 DSP
CSI2
Sensor Core
share w/
ADSP/LPASS
CCI0
Adrastea WLAN
Module
CCI1
2x2, 11ac,
VHT160, DBS
UFS1_L0
GPS Izat Gen9
LPDDR4x
2x16bit
SDC1
SDC2
USB0_SS
USB1_SS
USB_HS
QUP12
B2B
13
Copyright Intrinsyc Technologies Corporation
SPMI
CXO CXO
RESIN_N PON_RESET_N
QUP10
TX/RX 2xI/Q
WCSS
WLAN_CH0 CNTRL
WCSS1
WCSS2 WLAN_CH1 CNTRL
WCI2
QUP6 BT/FM HCI UART
SSC_UART1
BT/FM Audio
SLIMBUS
QUP0
QUP3
UIM1
UIM2_QUP13
SLIMbus
QUP8
6Gbps per lane
QLINK QLINK(1Tx/3Rx)
RFFE1 clk/data
JTAG
GPIO
GPIO
/RGB
PM670L
PM670
38.4
HVDCP
SMB1355
WCN3990
(WLAN/BT)
Via Analog I/Q
I2C
UIM
UIM
WCD9341
(Audio Codec)
WWAN
(SDR660)
JTAG
JTAG