R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition
3.5.5
Global Interrupt Status
The following table contains the interrupt status from the various sources to indicate which one caused that last
interrupt on the pin.
Table 3.41 Global Interrupt Status, Address 29G (0x1D)
Bit
Name
15:2
Reserved
1
PHY1 interrupt source
0
PHY0 interrupt source
R18UZ0043EJ0100
Mar 4, 2016
Access
RO
Reserved
RO
PHY1 interrupt source indication
0: PHY1 caused the interrupt
1: PHY1 did not cause the interrupt
RO
PHY0 interrupt source indication
0: PHY0 caused the interrupt
1: PHY0 did not cause the interrupt
Description
3. Registers
Default
0x0400
1
1
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