Extended; Table 3.28 Led Behavior, Address 30 (0X1E); Table 3.29 Extended/General Purpose Register Page Access, Address 31 (0X1F) - Renesas R-IN32M4-CL2 User Manual

R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition

Table 3.28 LED Behavior, Address 30 (0x1E)

Bit Name
1 LED1 combine feature
disable
0 LED0 combine feature
disable
Caution: Bits 30.11:10 are active only in port 0 and affect the behavior of LEDs for all the ports.
3.2.26 Extended Page Access
To provide functionality beyond the IEEE 802.3-specified registers and main device registers, an extended set of
registers provide an additional 15 register spaces.
The register at address 31 controls access to the extended registers. Accessing the General Purpose page register space
is similar to accessing the extended page registers. The following table shows the settings available.

Table 3.29 Extended/General Purpose Register Page Access, Address 31 (0x1F)

Bit Name
15:0 Extended/General Purpose
page register access
R18UZ0043EJ0100
Mar 4, 2016
Access
R/W Sticky bit
0: Combine enabled (link/activity, duplex/collision)
1: Disable combination (link only, duplex only)
R/W Sticky bit
0: Combine enabled (link/activity, duplex/collision)
1: Disable combination (link only, duplex only)
Access
R/W 0x0000: Register 16–30 accesses main register space. Writing
0x0000 to register 31 restores the main register access.
0x0001: Registers 16–30 access extended register space 1
0x0002: Registers 16–30 access extended register space 2
0x0010: Registers 0–30 access General Purpose register space
Description
Description
3. Registers
(2/2)
Default
0
0
Default
0x0000
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