R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition
3.2.6
Autonegotiation Expansion
The bits in main register 6 work together with those in register 5 to indicate the status of the LP autonegotiation
functioning. The following table shows the available settings and readouts.
Table 3.9 Autonegotiation Expansion, Address 6 (0x06)
Bit
Name
15:5
Reserved
4
Parallel detection fault
3
LP next page capable
2
Local PHY next page capable
1
Page received
0
LP is autonegotiation capable
3.2.7
Transmit Autonegotiation Next Page
The settings in register 7 in the main registers space provide information about the number of pages in an
autonegotiation sequence. The following table shows the settings available.
Table 3.10 Autonegotiation Next Page Transmit, Address 7 (0x07)
Bit
Name
15
Next page
14
Reserved
13
Message page
12
Acknowledge 2
11
Toggle
10:0
Message/unformatted code
R18UZ0043EJ0100
Mar 4, 2016
Access
RO
Reserved.
RO
This bit latches high.
1: Parallel detection fault.
RO
1: LP is next page capable.
RO
1: Local PHY is next page capable.
RO
This bit latches low.
1: New page is received.
RO
1: LP is capable of autonegotiation.
Access
R/W
1: More pages follow
RO
Reserved
R/W
1: Message page
0: Unformatted page
R/W
1: Complies with request
0: Cannot comply with request
RO
1: Previous transmitted LCW = 0
0: Previous transmitted LCW = 1
R/W
Message/unformatted code
Description
Description
3. Registers
Default
0x000
0
0
1
0
0
Default
0
0
1
0
0
0x001
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