Registers; Figure 3.1 Register Space Diagram - Renesas R-IN32M4-CL2 User Manual

R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition
3.

Registers

This section provides information about how to configure the GbE-PHY using its internal memory registers and the
management interface. The registers marked reserved should not be read or written to, because doing so may produce
undesired effects.
The default value documented for registers is based on the value at reset; however, in some cases, that value may
change immediately after reset.
The access type for each register is shown using the following abbreviations:
• RO: Read Only
• R/W: Read and Write
The GbE-PHY uses several different types of registers:
• IEEE Clause 22 device registers with addresses from 0 to 31
• Two pages of extended registers with addresses from 16E1–30E1 and 16E2–30E2
• General-purpose registers with addresses from 0G to 30G
The following illustration shows the relationship between the device registers and their address spaces.
0
1
2
3
.
.
.
13
14
15
16
17
18
19
.
Main Registers
.
.
.
.
30
31

Figure 3.1 Register Space Diagram

R18UZ0043EJ0100
Mar 4, 2016
IEEE 802.3
Standard
Registers
16E1
17E1
18E1
19E1
Extended
.
. Registers 1
.
.
.
30E1
0x0000 0x0001
0G
1G
2G
3G
.
.
.
.
.
15G
16E2 16G
17E2 17G
18E2 18G
19E2 19G
Extended
. .
. Registers 2 .
.
.
.
.
. .
30E2 30G
0x0002
3. Registers
General Purpose
Registers
0x0010
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