Register And Bit Conventions - Renesas R-IN32M4-CL2 User Manual

R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition
Reserved Registers
registers 0G–30G, any bits marked as Reserved should be processed as read-only and their states as undefined.
Reserved Bits In writing to registers with reserved bits, use a read-modify-then- write technique, where the entire
register is read but only the intended bits to be changed are modified. Reserved bits cannot be changed and heir read state
cannot be considered static or unchanging.
3.1

Register and Bit Conventions

This document refers to registers by their address and bit number in decimal notation. A range of bits is indicated with a
colon. For example, a reference to address 26, bits 15 through 14 is shown as 26.15:14.
A register with an E and a number attached (example 27E1) means it is a register contained within extended register
page number 1. A register with a G attached (example 13G) means it is a General Purpose page register.
Bit numbering follows the IEEE standard with bit 15 being the most significant bit and bit 0 being the least significant
bit.
R18UZ0043EJ0100
Mar 4, 2016
For main registers 16–31, extended registers 16E1–30E1, 16E2–30E2 and general purpose
3. Registers
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