Extended Page 2 Registers; Led Control; Table 3.36 Extended Registers Page 2 Space; Table 3.37 Led Control, Address 17E2 (0X11) - Renesas R-IN32M4-CL2 User Manual

R-IN32M4-CL2 User's Manual Gigabit Ethernet PHY Edition
3.4

Extended Page 2 Registers

To access the extended page 2 registers (16E2–30E2), enable extended register access by writing 0x0002 to register 31.
For more information, see Table 31.
When extended page 2 register access is enabled, reads and writes to registers 16–30 affect the extended registers
16E2–30E2 instead of those same registers in the IEEE- specified register space. Registers 0–15 are not affected by the
state of the extended page register access.
Writing 0x0000 to register 31 restores the main register access.
The following table lists the addresses and register names in the extended register page 2 space. These registers are
accessible only when the device register 31 is set to 0x0002.

Table 3.36 Extended Registers Page 2 Space

16E2
17E2
18E2–30E2

LED Control

3.4.1
The register at address 17E2 consists of the bits that provide additional LED control.

Table 3.37 LED Control, Address 17E2 (0x11)

Bit Name
15:14 Reserved
13:10 Invert LED polarity
9:6 Reserved
5 Enable 1000BASE-T force
mode
4:0 Reserved
R18UZ0043EJ0100
Mar 4, 2016
Address
Access
RO Reserved
R/W 1: Invert polarity of LED[3:0]_PHY[1:0] signals. Default is to drive an
active low signal on the LED pins.
RO Reserved.
R/W 1: Enable 1000BASE-T force mode to allow PHY to link-up in
1000BASE-T mode without forcing master/slave when register 0,
bits 6 and 13 are set to 2'b10.
RO Reserved
Reserved
LED Control
Reserved
Description
3. Registers
Name
Default
0000
0000
0x00
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00
0