Write Cycle - Toshiba TLCS-900/L1 Series Manual

(4) Write cycle

f
FPH
EA24, EA25,
A23 to A0
CSn
R/
W
WAIT
Port output
(Note)
,
WR HWR
D0 to D15
Note: Since the CPU accesses the internal area to write data to a port, the control signals of external
pins such as
WR
regarded as depicting internal operation. Please also note that the timing and AC characteristics
of port input/output shown above are typical representation. For details, contact your local Toshiba
sales representative.
t
and are not enabled. Therefore, the above waveform diagram should be
CS
91C824-225
t
APO
WW
t
DW
D0 to D15
TMP91C824
t
CAW
t
WD
2008-02-20