Toshiba TLCS-900/L1 Series Manual page 179

Original cmos 16-bit microcontroller
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(2) Transfer modes
The SBI0CR1<SIOM1:0> is used to select a transmit, receive or transmit/receive
mode.
a.
8-bit transmit mode
Set a control register to a transmit mode and write transmit data to the
SBI0DBR.
After the transmit data is written, set the SBI0CR1<SIOS> to 1 to start data
transfer. The transmitted data is transferred from SBI0DBR to the shift register
and output to the SO pin in synchronized with the serial clock, starting from the
least significant bit (LSB), When the transmission data is transferred to the shift
register, the SBI0DBR becomes empty. An INTSBI (Buffer empty) interrupt
request is generated to request new data.
When the internal clock is used, the serial clock will stop and automatic-wait
function will be initiated if new data is not loaded to the data buffer register
after the specified 8-bit data is transmitted. When new transmit data is written,
automatic-wait function is canceled.
When the external clock is used, data should be written to SBI0DBR before
new data is shifted. The transfer speed is determined by the maximum delay
time between the time when an interrupt request is generated and the time
when data is written to SBI0DBR by the interrupt service program.
When the transmit is started, after the SBI0SR<SIOF> goes 1 output from the
SO pin holds final bit of the last data until falling edge of the SCK.
Transmitting data is ended by clearing the <SIOS> to 0 by the buffer empty
interrupt service program or setting the <SIOINH> to 1. When the <SIOS> is
cleared, the transmitted mode ends when all data is output. In order to confirm if
data is surely transmitted by the program, set the <SIOF> (Bit3 of SBI0SR) to be
sensed. The SBI0SR<SIOF> is cleared to 0 when transmitting is complete. When
the <SIOINH> is set to 1, transmitting data stops. SBI0SR<SIOF> turns 0.
When an external clock is used, it is also necessary to clear SBI0SR<SIOS> to
0 before new data is shifted; otherwise, dummy data is transmitted and
operation ends.
91C824-177
TMP91C824
2008-02-20

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