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5.
Table of SFRs
The SFRs (Special function registers) include the I/O ports and peripheral control registers
allocated to the 4-Kbyte address space from 000FE0H to 000FFFH.
(1) I/O port
(2) I/O port control
(3) Interrupt control
(4) Chip select/wait control
(5) Clock gear
(6) DFM (Clock doubler)
(7) 8-bit timer
(8) UART/Serial channel
(9) I
C bus/serial channel
2
(10) AD converter
(11) Watchdog timer
(12) RTC (Real time clock)
(13) Melody/alarm generator
(14) MMU
Table layout
Symbol
Note: Prohibit RMW in the table means that you cannot use RMW instructions on these register.
Example:
When setting bit0 only of the register PxCR, the instruction SET 0, (PxCR) cannot
be used. The LD (Transfer) instruction must be used to write all eight bits.
Read/Write
R/W: Both read and write are possible.
R:
Only read is possible.
W:
Only write is possible.
W*:
Both read and write are possible (when this bit is read as 1).
Prohibit RMW: Read-modify-write instructions are prohibited. (The EX, ADD, ADC, BUS,
R/W*: Read-modify-write instructions are prohibited when controlling the pull-up resistor.
Name
Address
7
SBC, INC, DEC, AND, OR, XOR, STCF, RES, SET, CHG, TSET, RLC, RRC,
RL, RR, SLA, SRA, SLL, SRL, RLD and RRD instruction are read-modify-
write instructions.)
91C824-232
6
1
0
Bit symbol
Read/Write
Initial value after reset
Remarks
TMP91C824
2008-02-20
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