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3.3.2
SFR
7
Bit symbol
SYSCR0
XEN
Read/Write
(00E0H)
After reset
1
Function
High-
frequency
oscillator (fc)
0: Stop
1: Oscillation
7
Bit symbol
SYSCR1
Read/Write
(00E1H)
After reset
Function
7
Bit symbol
SYSCR2
Read/Write
(00E2H)
After reset
Function
Note 1: By reset, low-frequency oscillator is enable.
Note 2: In case of using built-in SBI circuit, it must set SYSCR0<PRCK1:0> to 00.
6
5
XTEN
RXEN
RXTEN
1
1
Low-
High-
Low-
frequency
frequency
frequency
oscillator (fs)
oscillator (fc)
oscillator (fs)
0: Stop
after release
after release
1: Oscillation
of STOP
of STOP
(Note 1)
mode
mode
0: Stop
0: Stop
1: Oscillation
1: Oscillation
6
5
6
5
SCOSEL
WUPTM1
WUPTM0
R/W
R/W
R/W
0
1
0: fs
Warm-up timer
1: f
00: Reserved
SYS
8
01: 2
inputted frequency
14
10: 2
16
11: 2
Figure 3.3.3 SFR for System Clock
91C824-15
4
3
2
RSYSCK
WUEF
R/W
0
0
0
Warm-up timer
Selects clock
0: Write
after release
Don't care
of STOP
1: Write
mode
start timer
0: fc
0: Read
1: fs
end warm up
1: Read
do not end
warm up
4
3
2
SYSCK
GEAR2
0
1
Select
Select gear value of high frequency (fc)
system
000: fc
clock
001: fc/2
0: fc
010: fc/4
1: fs
011: fc/8
100: fc/16
101: (Reserved)
110: (Reserved)
111: (Reserved)
4
3
2
HALTM1
HALTM0
R/W
R/W
0
1
1
HALT mode
00: Reserved
01: STOP mode
10: IDLE1 mode
11: IDLE2 mode
TMP91C824
1
0
PRCK1
PRCK0
0
0
Select prescaler clock
00: f
(Note 2)
FPH
01: Reserved
10: fc/16
11: Reserved
1
0
GEAR1
GEAR0
R/W
0
0
1
0
SELDRV
DRVE
R/W
R/W
0
0
<DRVE>
Pin state
mode
control in
select
STOP/IDLE1
0: STOP
mode
1: IDLE1
0: I/O off
1: Remains
the state
before
halt
2008-02-20
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