Toshiba TLCS-900/L1 Series Manual page 210

Original cmos 16-bit microcontroller
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(2) Timing of INTRTC and Clock data
When time is read by interrupt, read clock data within 0.5s(s) after generating
interrupt. This is because count up of clock data occurs by rising edge of 1Hz pulse
cycle.
ALARM
INTRTC
1s counter
56
(Internal signal)
1s count UP
(Internal signal)
Figure 3.13.3 Timing of INTRTC and Clock data
0
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91C824-208
TMP91C824
1
2
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2008-02-20

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