VSUB
31
26
25
COP2
0 1 0 0 1 0
6
Format:
vsub vd, vs, vt
vsub vd, vs, vt[e]
Description:
The 16-bit elements of vector register
elements of vector register
cleared.
The results are clamped to 16 bit signed values and placed into vector register
If an element specification
used as described below.
Revision 1.0
Vector Subtraction
of Short Elements
24
21
20
16
1
e
vt
1
4
5
vt
vs
. The vector control register VCO is used as borrow in; and VCO is
e
is present for vector register
15
11
10
vs
vd
5
5
are subtracted on an element-by-element basis from the
vt
, the selected scalar element(s) of
VSUB
6
5
0
VSUB
0 1 0 0 0 1
6
vd
.
vt
is
317