Nintendo Ultra64 Programmer's Manual page 169

BNE
31 26 25
BNE
0 0 0 1 0 1
6
Format:
bne rs, rt, offset
Description:
A branch target address is computed from the sum of the address of the instruction in the delay slot
offset,
and the 16-bit
the contents of general register
branches to the target address, with a delay of one instruction.
Since the RSP program counter is only 12 bits, only 12 bits of the calculated address are used.
Operation:
target  (offset
T:
condition  (GPR[rs]  GPR[rt])
T+1: if condition then
PC
endif
Exceptions:
None
Revision 1.0
Branch On Not Equal
21 20
rs rt
5 5
shifted left two bits and sign-extended. The contents of general register
rt
are compared. If the two registers are not equal, then the program
14 2
) || offset || 0
15
 PC
+ target
11...0 11...0
16 15
offset
16
11...0
BNE
0
rs
and
169