Nintendo Ultra64 Programmer's Manual page 200

MTC2
31
COP2
0 1 0 0 1 0
6
Format:
mtc2
Description:
The least significant 16 bits of general register
Operation:
T: data
T+1: VR[vd][e]
Exceptions:
None 
200
Coprocessor 2 (VU)
26 25 21 20
MT
0 0 1 0 0
5
rt, vd[e]
 GPR[rt]
15...0 15...0
 data
15...0 15...0
Move To
16 15 11 10
rt rd
5 5
rt
are loaded at byte element
MTC2
7 6
0
e
0 0 0 0 0 0 0
7
4
e
of VU register
0
vd.