Nintendo Ultra64 Programmer's Manual page 221

SRAV
31 26 25
SPECIAL
0 0 0 0 0 0
6
Format:
srav rd, rt, rs
Description:
The contents of general register
five bits of general register
The result is placed in register
Operation:
s  GPR[rs]
T:
GPR[rd]  (GPR[rt]
Exceptions:
None
Revision 1.0
Shift Right
Arithmetic Variable
21 20 16
rs rt
5 5
rt
are shifted right by the number of bits specified by the low-order
rs
, sign-extending the high-order bits.
rd
.
4...0
s
) || GPR[rt]
31 31...s
15 11 10
rd 0
0 0 0 0 0
5 5
SRAV
6 5 0
SRAV
0 0 0 1 1 1
6
221