Nintendo Ultra64 Programmer's Manual page 231

Rsp
Table of Contents

Advertisement

SWV
31
26
SWC2
1 1 1 0 1 0
6
Format:
swv vt[element], offset(base)
Description:
This instruction gathers a diagonal vector of shorts from a group of eight VU registers, writing to
an aligned 128 bit memory word. The VU register number of each slice is computed as
(VT & 0x18) | ((Slice + (Element >> 1)) & 0x7) , which is to say that
8 register group. SWV performs a circular shift of the 8 shorts by (element >> 1), which is equivalent
to:
dest_short[ Slice ] = source_short[((Slice + (Element >> 1)) & 0x7)]
The effective address is computed by adding the
GPR).
Note:
ordinal element count, as in VU computational instructions.
Operation:
See "Transpose" on page 54.
Exceptions:
None
Revision 1.0
Store Wrapped
from Vector Register
25
21
20
16
base
vt
5
5
element
The element specifier
15
11
10
SWV
element
0 0 1 1 1
5
4
offset
to the contents of the
is the byte element of the vector register, not the
SWV
7
6
0
offset
7
vt
specifies the beginning of an
base
register (a SU
231

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents