JR
31
SPECIAL
0 0 0 0 0 0
Format:
jr
rs
Description:
The program unconditionally jumps to the address contained in general register
one instruction.
Since instructions must be word-aligned, a Jump Register instruction must specify a target register
rs
(
) whose two low-order bits are zero.
Since the RSP program counter is only 12 bits, only 12 bits of the calculated address are used.
Operation:
T:
T+1:
Exceptions:
None
176
26
25
21 20
rs
6
5
temp GPR[rs]
temp
PC
11...0
Jump Register
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15
11...0
JR
6 5
0
JR
0 0 1 0 0 0
6
rs
, with a delay of