Nintendo Ultra64 Programmer's Manual page 218

SPV
31
SWC2
1 1 1 0 1 0
6
Format:
spv vt[0], offset(base)
Description:
This instruction stores the upper byte from each of eight VU regsiter elements, to consecutive bytes
of a 128-bit word in DMEM. See Figure 3-3, "Packed Loads and Stores," on page 53.
The effective address is computed by adding the
GPR).
Operation:

T:
Addr ((offset
for i in 0...7
endfor
Exceptions:
None
218
Store Packed Bytes
from Vector Register
26 25 21 20
base
5
The element specifier
Note:
16
) || offset
15
Addr = Addr + i
data  VR[vt][i*2]
StoreDMEM (BYTE, data, Addr
16 15 11
vt SPV
0 0 1 1 0
5 5
offset
element
should be 0.
) + GPR[base]
15...0
15...8
)
11...0
SPV
10 7 6
element offset
4 7
base
to the contents of the
0
register (a SU