Nintendo Ultra64 Programmer's Manual page 164

BGEZAL
31
REGIMM
0 0 0 0 0 1
Format:
bgezal rs, offset
Description:
A branch target address is computed from the sum of the address of the instruction in the delay slot
and the 16-bit
instruction after the delay slot is placed in the link register,
rs
have the sign bit cleared, then the program branches to the target address, with a delay of one
instruction.
General register
Since the RSP program counter is only 12 bits, only 12 bits of the calculated address are used.
Operation:
target  (offset
T:
condition  (GPR[rs]
GPR[31]  PC + 8
T+1: if condition then
endif
Exceptions:
None
164
Branch On Greater Than
Or Equal To Zero And Link
26 25 21 20
rs
1 0 0 0 1
6 5
offset,
shifted left two bits and sign-extended. Unconditionally, the address of the
rs may not be general register
14
) || offset || 0
15
= 0)
31
 PC
PC
11...0 11...0
16 15
BGEZAL
5
31 , because such an instruction is not restartable.
2
+ target
11...0
BGEZAL
offset
16
r31
. If the contents of general register
0