Nintendo Ultra64 Programmer's Manual page 11

Figure 2-1 Block Diagram of the RCP ..........................................................................................25
Figure 2-2 SU Register Format......................................................................................................32
Figure 2-3 VU Register Format .....................................................................................................34
Figure 2-4 VU Accumulator Format..............................................................................................36
Figure 2-5 VCC Register Format...................................................................................................37
Figure 2-6 VCO Register Format ..................................................................................................37
Figure 2-7 VCE Register Format ...................................................................................................38
Figure 2-8 RSP Block Diagram .....................................................................................................42
Figure 2-9 Pipeline Bypassing .......................................................................................................44
Figure 3-1 VU Load and Store Instruction Format........................................................................48
Figure 3-2 Long, Quad, and Rest Loads and Stores ......................................................................51
Figure 3-3 Packed Loads and Stores..............................................................................................53
Figure 3-4 Packed Load and Store Alignment...............................................................................54
Figure 3-5 Transpose Loads and Stores.........................................................................................55
Figure 3-6 VU Coprocessor Moves ...............................................................................................56
Figure 3-7 VU Computational Instruction Format ........................................................................57
Figure 3-8 Scalar Half and Scalar Quarter Vector Register Elements...........................................59
Figure 3-9 VU Multiply Opcode Encoding ...................................................................................61
Figure 3-10 Double-precision VU Multiply ....................................................................................64
Figure 3-11 VU Add Opcode Encoding ..........................................................................................67
Figure 3-12 VU Select Opcode Encoding .......................................................................................70
Figure 3-13 VU Logical Opcode Encoding .....................................................................................74
Figure 3-14 VU Divide Opcode Encoding ......................................................................................75
Figure 4-1 DMA Transfer Length Encoding .................................................................................84
Figure 4-2 DMA Read/Write Example..........................................................................................98
Figure 4-3 DMA Wait Example ....................................................................................................99
Figure 4-4 RDP Initialization Using the XBUS ..........................................................................101
Figure 4-5 OutputOpen Function Using the XBUS.....................................................................102
Figure 4-6 OutputClose Function Using the XBUS ....................................................................103
Figure 6-1 Real-time Clock Watching on the RSP ......................................................................134
List of Figures
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