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cPCI-MXS64GX Technical Reference Manual
3.3.4.2. Watchdog
The function of a watchdog is to reset the CPU board if the processor is not able to
generate a trigger for longer than the watchdog time-out period. This feature is useful in
embedded systems where human supervision is not required or impossible.
The cPCI-MXS64GX provides a two-stage digital watchdog with software programmable
time-out period.
Following a reset of any source, the watchdog is disabled. The watchdog can be enabled by
software.
Dual Stage Watchdog
Enabling the Programmable Watchdog
To enable the programmable watchdog, first unlock the enable bit by clearing the lock bit
in register 0x92h (bit 2), then set th4e bit WDEN (bit 7) in register n92h and relock it by
setting the lock bit in register 0x92 (bit 2). The following is an example in C language :
#define TekReg 0x190
void ArmWatchdog(void)
{
outp{TekReg+2, inp(TekReg+2) & 0xFB);
outp{TekReg+6, inp(TekReg+6) | 0xF0);
outp{TekReg+2, inp(TekReg+2) | 0x04);
}
Triggering the Programmable Watchdog
To trigger the programmable watchdog, the processor writes to register n92h (n=1, 2 or 3).
The action of writing to the register is the trigger and the value written to the register tells
the watchdog the current time-out to use (see register n92h description). For a fixed time-
out, the software simply writes a constant in register x92h.
// define base address (0x190, 0x290 or 0x390
// unlock watchdog enable bit
// enable and trigger at max time-out
// lock watchdog enable bit
3.20
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