Data; Control; Setting The Fpga Mode Select Pins - Xilinx Spartan-3A User Manual

Chapter 11: Parallel NOR Flash PROM

Data

Figure 11-3
assignment and the I/O standard used.

Control

Figure 11-4
assignment and the I/O standard used.

Setting the FPGA Mode Select Pins

To configure the FPGA from NOR Flash, set the FPGA configuration mode pins for BPI Up
mode, as shown in
Down mode that is available in the Spartan-3E FPGA family.
Also be sure to disable the Platform Flash PROM by removing jumper J46, as shown in
Table
Table 11-3: Selecting BPI-Up Configuration Mode (J26)
Configuration Mode Pins
Mode M2:M1:M0
BPI Up 0:1:0
88
provides the UCF constraints for the Flash data pins, including the I/O pin
# NET "NF_D<15>" --> use NF_A<0> on pin T17 when NF_BYTE = High
NET "NF_D<14>" LOC = "R21"
NET "NF_D<13>" LOC = "T22"
NET "NF_D<12>" LOC = "U22"
NET "NF_D<11>" LOC = "U21"
NET "NF_D<10>" LOC = "V22"
NET "NF_D<9>" LOC = "W22"
NET "NF_D<8>" LOC = "T20"
NET "NF_D<7>" LOC = "Y9"
NET "NF_D<6>" LOC = "AB9"
NET "NF_D<5>" LOC = "Y11"
NET "NF_D<4>" LOC = "AB11" |
NET "NF_D<3>" LOC = "U13"
NET "NF_D<2>" LOC = "AA17" |
NET "NF_D<1>" LOC = "Y17"
NET "SPI_MISO" LOC = "AB20" |
Figure 11-3: UCF Location Constraints for Flash Data I/O Pins
provides the UCF constraints for the Flash control pins, including the I/O pin
NET "NF_BYTE" LOC = "Y21"
NET "NF_CE" LOC = "W20"
NET "NF_OE" LOC = "W19"
NET "NF_RP" LOC = "R22"
NET "NF_STS" LOC = "P22"
NET "NF_WE" LOC = "AA22" |
NET "NF_WP" LOC = "E14"
Figure 11-4: UCF Location Constraints for Flash Control Pins
Table 11-3. The Spartan-3A/3AN FPGA families do not support the BPI
11-3.
FPGA Configuration Image in
Flash
FPGA starts at address 0 and
increments through address space.
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| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
IOSTANDARD = LVCMOS33 |
| IOSTANDARD = LVCMOS33 |
Mode Select Jumper
Settings (J26)
M0
M1
M2
J26
Spartan-3A/3AN Starter Kit Board User Guide
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 6 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
PULLUP ;
DRIVE = 4 | SLEW = SLOW ;
DRIVE = 4 | SLEW = SLOW ;
Platform Flash
Enable (J46)
DONE
CE
PROM
GND
J46
UG334 (v1.0) May 28, 2007
R