Operation; Ucf Location Constraints; Optional Discrete Leds - Xilinx Spartan-3A User Manual

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Operation

Each LED has one side connected to ground and the other side connected to a pin on the
device via a 390Ω current limiting resistor. To light an individual LED, drive the associated
FPGA control signal High.
If the FPGA is not yet configured, the LEDs may be dimly lit because pull-up resistors are
enabled during configuration. The FPGA's PUDC_B pin is connected to GND on the
board.

UCF Location Constraints

Figure 2-13
I/O pin assignment, the I/O standard used, the output slew rate, and the output drive
current.

Optional Discrete LEDs

The Spartan-3A/3AN Starter Kit board provides two optional LEDs, shown in
Depending on which features are used by an application, these LED connections may be
also used as user-I/O pins.
Spartan-3A/3AN Starter Kit Board User Guide
UG334 (v1.0) May 28, 2007
provides the UCF constraints for the four push-button switches, including the
NET "LED<7>" LOC = "W21" |
NET "LED<6>" LOC = "Y22" |
NET "LED<5>" LOC = "V20" |
NET "LED<4>" LOC = "V19" |
NET "LED<3>" LOC = "U19" |
NET "LED<2>" LOC = "U20" |
NET "LED<1>" LOC = "T19" |
NET "LED<0>" LOC = "R20" |
Figure 2-13: UCF Constraints for Eight Discrete LEDs
Figure 2-14: AWAKE and INIT_B LEDs
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IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
IOSTANDARD = LVTTL |
FPGA PROG_B Pin
(Press to reset/reprogram FPGA)
FPGA_INIT_B
(W21)
RED
FPGA DONE Pin
(Lit when FPGA is configured)
GREEN
Optional Discrete LEDs
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
SLEW = QUIETIO | DRIVE
Figure
FPGA_AWAKE
(AB15)
YELLOW
YELLOW
UG334_c2_14_052407
= 4 ;
= 4 ;
= 4 ;
= 4 ;
= 4 ;
= 4 ;
= 4 ;
= 4 ;
2-14.
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