Shared Spi Flash And Platform Flash Data Line; Jumper Settings To Configure Fpga From Selected Spi Flash Prom - Xilinx Spartan-3A User Manual

Chapter 12: SPI Serial Flash

Shared SPI Flash and Platform Flash Data Line

The SPI_MISO signal from the two SPI Flash PROMs is shared with data output signals
from the parallel NOR Flash PROM and the serial output from the Platform Flash PROM
as shown in
one data source is active at any time.
Table 12-3: Possible Potential Competing Devices on SPI_MISO (NF_D<0>) Data

Jumper Settings to Configure FPGA from Selected SPI Flash PROM

To successfully configure the FPGA from the selected external SPI Flash PROM, set the
following jumpers as described below.
•
•
Table 12-4: Configuration Mode Jumper Settings for Master SPI Mode (J26, J46)
•
94
Table 12-3. To avoid contention, the FPGA application must ensure that only
Signal or
Disabled Device
Jumper
Jumper J46 Platform Flash PROM.
FPGA_INIT_B
SPI_SS_B SPI Flash PROM selected by
Jumper J1, as shown in
Table 12-2, page
ALT_SS_B SPI Flash PROM selected by
Jumper J1, as shown in
Table 12-2, page
NF_CE Parallel Flash PROM
NF_OE
Set the FPGA configure mode, using the Jumper J26 jumper header, shown in
Table 12-4.
Disable the Platform Flash PROM using Jumper J46, shown in
Configuration Mode
Master SPI
Select one of the SPI serial Flash PROMs as the SPI configuration source, as shown in
Table 12-2.
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Set to "Disabled" or "Enable
during Configuration" as
shown in
FPGA_INIT_B has no effect.
If set to "Always Enabled," then
FPGA_INIT_B must be 1
93.
93.
NF_CE = 1 or NF_OE = 1
Mode Pins
M2:M1:M0 Jumper J26 Settings
0:0:1
M0
M1
M2
J26
Spartan-3A/3AN Starter Kit Board User Guide
Disable Value
Table 4-2, page 40.
1
1
Table 12-4.
Platform Flash
Enable (J46)
DONE
CE
PROM
GND
J46
UG334 (v1.0) May 28, 2007
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