Clock Routing For A Two Device Sdram Subsystem; Sdram Clock Buffer Information - Intel i960 Design Manual

Intel® i960® RM/RN I/O Processor
®
Intel 80960RM/RN Processor Memory Subsystem
Any memory configuration using four or more discrete SDRAM components directly on the board
must adhere to the same routing requirements specified in the 4-Clock 66 MHz 72-bit ECC
Unbuffered SDRAM DIMM Specification.
SDRAM input clock when the configuration uses two SDRAM components.
Figure 4-11. Clock Routing for a Two Device SDRAM Subsystem
Clock
Buffer
Suggested clock driver components are listed in
warranty of the performance of the listed product and company.
Table 4-6.

SDRAM Clock Buffer Information

22
Figure 4-11
Traces from the
processor to the resistor
must be within 0.5 inches
30 ohms +/- 5%
1 to 8 inches
*
Manufacturer
Cypress
Motorola
Pericom
Pericom
illustrates the routing requirements for the
SDRAM
1Mx16
Clock
0.4 inches
SDRAM
1Mx16
Table 4-6. This is neither an endorsement nor a
Part Number
CY2310NZPVC-1
MPC9140SD
P16C182
P16C180V
Design Guide