Rm/Rn I/O Processor Debug Connector Wiring - Intel i960 Design Manual

Figure 12-17
and the pins/balls of the i960 RM/RN I/O processor family.
®
Table 12-17. i960

RM/RN I/O Processor Debug Connector Wiring

Header Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Design Guide
describes the interconnections required between the target debug interface connector
®
i960 RM/RN I/O
Processor
Ball/Direction
C11
A12
E11
B11
C12
A21
A11
Intel® i960® RM/RN I/O Processor
Debug Connector Recommendations
Signal Name Recommended Target Resistor
Ω
TRST# 1K
GND
Ω
TDI 1K
GND
TDO
GND
Ω
TMS 1K
GND
Ω
TCK 1K
GND
Ω
LCDINIT# 1K
GND
I_RST#
GND
*
Connected to V
PWRVLD
resistor
GND
pull-down
pull-up
pull-up
pull-up
pull-up
Ω
through 1K series
CC
49