Default Switch And Jumper Settings - Xilinx SP701 User Manual

Table 3: Board Component Locations (cont'd)
Callout
26 Configuration options, FPGA U1 configuration mode
4-pole DIP switch, (SW13)
27 XADC/SYSMON 2x10 shrouded/keyed
Header (J24)
28 Encryption Key Battery Backup Circuit
Battery retainer [B1]
29 System Controller MSP430
JTAG Header (J22)
30 Ethernet 1x4 0.1" JTAG header (J10)

Default Switch and Jumper Settings

Jumpers
Default jumper settings are listed in the following table. The table also references the respective
schematic (0381874) page numbers.
Table 4: Default Jumper Settings
Callout Jumper
31 J38
32 J2
33 J6
34 J23
34 J25
34 J26
34 J27
34 J28
35 J35
Switches
Default switch settings are listed in the following table. The table also references the respective
schematic (0381874) page numbers.
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Feature [#] = Bottom
2x7 0.1"
Type
2-pin male header USB JTAG enable
2-pin male header FPGA U1 CFGBVS_0
2-pin male header FT4232 U6 SUSPEND
3-pin male header FPGA U1 XADC_VCC Select
3-pin male header REF3012 U29 V
3-pin male header FPGA U1 XADC_VREFP Select
2-pin male header GND-to-J28/L12
2-pin male header J28/L12-to-XADC_GND
2-pin male header Power System Inhibit
Chapter 2: Board Setup and Configuration
Notes
Wurth 416131160804
Samtec TST-110-01-G-D
Keystone 2998
Tyco 5103308-2
Sullins PBC36DAAN
Function
Select
in
Send Feedback
Schematic
Page
Number
3
22
3
19
9
Schematic
Default Page
Number
Jumper ON 5
Jumper OFF 3
Jumper OFF 5
2-3 22
1-2 22
1-2 22
Jumper ON 22
Jumper OFF 22
Jumper OFF 23
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