Xilinx SP701 User Manual page 27

Table 9: XC7S100 U1 FPGA I2C Bus Connectivity
I2C0 Bus
TCA9548 8-Chan. Switch U23
I2C01_EEPROM_SDA/SCL
I2C02_SYSOSC_SDA/SCL
I2C03_12VMON_SDA/SCL
I2C04_1VMON_SDA/SCL
I2C05_SYSMON_SDA/SCL
I2C06_MP5470_SDA/SCL
I2C07_FMC_SDA/SCL
NOT USED
I2C2_CAM_SDA/SCL
I2C3_DSI_SDA/SCL
I2C4_HDMI_SDA/SCL
TCA6416 Dual 8-bit I/O Port
U24
The MSP430 system controller U25 has a local I2C_MSP430_SDA/SCL bus connected to a dual
8-bit port TI TCA6416A I/O expander U24 (address 0x40). The I/O expander is used for control
outputs and status inputs as listed in the following table.
Table 10: MSP430 TCA6416A U24 I/O Expander Connections
Port #
P00
P01
P02
P03
P04
P05
P06
P07
P10
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
I2C Switch
Position
Binary Format
N/A
0
1
2
3
4
5
6
7
XC7S100 FPGA U1 BANK 33 I2C Port
U1.AE13/AD13
XC7S100 FPGA U1 BANK 13 I2C Port
U1.AB24/AC26
XC7S100 FPGA U1 BANK 15 I2C Port
U1.K23/J24
MSP430 U25 PORT P4_1, P4_2 I2C_MSP430_SDA/SCL Bus
N/A
TCA6416A U24 I/O Expander Addr. 0b0100000, 0x40
Schematic Net Name
EN_1V35
EN_1V1_ETH
EN_5V
EN_3V3_EXT
EN_VADJ
EN_1V_1V8_2V5_3V3
VSEL0_VADJ
VSEL1_VADJ
12VCURSNS_ALERT
Chapter 3: Board Component Descriptions
I2C Address
Hex Format
0b1110100 0x74
0b1010000 0x50
0b1010101 0x55
0b1000001 0X41
0b1000100 0x44
N/A N/A
0b1101000 0x68
0b1010000 0x50
N/A N/A
0b1101000 0x78
0bTBD 0xTBD
0b1100010 0x72
0b0100000 0x40
DIR Connected Device
IN U35 MPM3620A VCCO_1V35 regulator
IN U38 MPM3805G 1V1_VDD regulator
IN U36 MPM3606A 5V regulator
IN U39 MP8756G 3V3_EXT regulator
OUT U40 MP8756G VADJ regulator
IN U34 MP5470G VCCINT_1V, VCCO_1V8, VCCO_2V5,
VCCO_3V3 multi-output regulator
OUT Q17 FB_VADJ_VSEL0 U40 MP8756G VADJ regulator
feedback adjusting switch
OUT Q18 FB_VADJ_VSEL1 U40 MP8756G VADJ regulator
feedback adjusting switch
IN U32 INA226 POWER MONITOR ON INPUT 12V
Send Feedback
Target Device
U23 TCA9548A
U27 M24C32
U45 SI570
U32 INA226
U33 INA226
TP10/TP11 TEST POINT
U34 MP5470GL PMIC
J21 FMC LPC
N/A
J8 MIPI-CSI
J20 MIPI-DSI
U18 ADV7511 HDMI
U24 TCA6416A
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