Xilinx SP701 User Manual page 36

On the first use of the SCUI, go to the FMC → Set VADJ → Boot-up tab and click USE FMC
EEPROM Voltage. The SCUI buttons are grayed out during command execution and return to
their original appearance when ready to accept a new command. See the SP701 System
Controller Tutorial (XTP551) and the SP701 Software Install and Board Setup Tutorial (XTP552)
for more information on installing and using the System Controller utility.
For more details, see the MSP430F5342 data sheet on the
detailed FPGA connections for the feature described in this section are documented in the
SP701 board XDC file, referenced in
FPGA Mezzanine Card Interface
[Figure 2, callout 7]
The SP701 evaluation board supports the
by providing a low pin count (LPC) FMC connector at J21. LPC connectors use a 10 x 40 form
factor that is partially populated with 160 pins. The connector is keyed so that a mezzanine card,
when installed in the FMC LPC connector on the SP701 evaluation board, faces away from the
board. The FMC LPC connector pinout is shown in the
Pinouts.
FMC LPC Connector J21
[Figure 2, callout 7]
The 160-pin connector J21 implements partial FMC LPC connectivity (refer to schematic
0381874 and the XDC file for details).
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Figure 19: SCUI Graphical User Interface
Appendix B: Xilinx Design
VITA 57.1 FPGA mezzanine card (FMC) specification
Chapter 3: Board Component Descriptions
Texas Instruments website. The
Constraints.
Appendix A: VITA 57.1 FMC Connector
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