Xilinx SP701 User Manual page 25

The detailed FPGA connections for the feature described in this section are documented in the
SP701 board XDC file, referenced in
Ethernet PHY Status LEDs
Figure 2, callouts 8, 9
Each Ethernet PHY is connected to a RJ-45 connector with status LEDs integrated into the metal
frame of the connector. The two PHY status LEDs are visible within the frame of each RJ45
Ethernet jack as shown in the following figure. As viewed from the front opening, the left green
LED is the link activity indicator and the right green LED is the 1000BASE-T link mode indicator.
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Figure 10: Ethernet JTAG
Appendix B: Xilinx Design
Figure 11: Ethernet PHY Status LEDs
Chapter 3: Board Component Descriptions
Constraints.
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