Xilinx SP701 User Manual page 16

The Keystone 2998 battery retainer B1 is soldered to the board with the positive output
connected to the FPGA U1 VCC_PSBATT pin D13. The B1 retainer accepts a 6.8 mm 1.5V
single-cell, coin type battery similar to Seiko part number SR621SW, silver oxide, 1.55V non-
rechargeable battery.
Bank Voltage Rails
The XC7S100 FPGA U1 bank voltages are listed in the following table.
Table 7: FPGA U1 Bank Voltage Rails
XC7S100 U1 Bank
0
13
14
15
16
33
34
35
36
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Figure 3: Encryption Key Backup Circuit
Power Net Name Voltage
VCCO_3V3 3.3V
VCCO_1V8 1.8V
VCCO_3V3 3.3V
VCCO_3V3 3.3V
VCCO_3V3 3.3V
VCCO_2V5 2.5V
VCCO_1V35 1.35V
VADJ 1.8V (nom),
3.3V, 2.5V
VADJ 1.8V (nom),
3.3V, 2.5V
Chapter 3: Board Component Descriptions
Connected To
FPGA Configuration I/F
MIPI_DSI, GPIO Switches, FT4232_C_UART, I2C3_DSI Bus
FLASH_SPI, FT4232_B_UART
HDMI Out, I2C4_HDMI Bus, GPIO LEDs, XADC I/F
PMOD[1:6] I/F
Ethernet PHY 1/2 I/F, MIPI_CSI, I2C2_CAM
DDR3L I/F
LPC FMC I/F, MPS430_GPIO
LPC FMC I/F, MPS430_GPIO
Send Feedback
www.xilinx.com
16