Xilinx SP701 User Manual page 19

The following figure shows the configuration flash memory interface.
The detailed FPGA connections for the feature described in this section are documented in the
SP701 board XDC file, referenced in
SP701 JTAG Chain
[Figure 2, callout 13]
The SP701 JTAG chain has the following components:
• J5 USB micro-AB connector connected to U6 FT4232HQ USB-JTAG bridge
• U1 XCS700 FPGA
• J21 FMC LPC connector
• J3 2x7 2 mm shrouded, keyed JTAG pod flat cable connector
The SP701 board JTAG chain is shown in the following figure.
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Figure 5: Configuration Flash Memory Interface
U1
Spartan-7
FPGA
Appendix B: Xilinx Design
Chapter 3: Board Component Descriptions
FLASH_DQ[0]
DQ0
FLASH_DQ[1]
DQ1
FLASH_DQ[2]
DQ2/W#
FLASH_DQ[3]
DQ3/HOLD#/RESET#
SPI NOR FLASH
MT25QL01G
FLASH_CLK
C
CS#
S#
X22788-042619
Constraints.
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