Reset Source; Boot Option; Table 8. Boot-Related Switches - ST STM32373C-EVAL User Manual

Hardware layout and configuration
2.5

Reset source

The reset signal of the STM32373C-EVAL evaluation board is "low active" and the reset
sources (see
●
Reset button B1
●
Debugging tools from JTAG/SWD connector CN17 and ETM trace connector CN15
● daughterboard from CN14
●
Embedded ST-LINK/V2
● RS-232 connector CN12 for ISP (in-situ programming)
Note: See Section 2.9: RS-232 and IrDA
handled by pin 8 of the RS-232 connector CN12 (clear to send (CTS) signal).
2.6

Boot option

The STM32373C-EVAL evaluation board is able to boot from:
●
Embedded user Flash
●
System memory with boot loader for ISP
●
Embedded SRAM for debugging
The boot option is configured by setting switch SW1 (BOOT0) and the User Option Bytes
bit12 (BOOT1) in the small information block (SIF). BOOT0 can also be configured via the
RS-232 connector CN12.
Table 8. Boot-related switches
STM32373C-EVAL boot from User Flash when SW1 and bit12 in the
User Option Bytes are set as shown to the right.
This is the default setting.
STM32373C-EVAL boot from Embedded SRAM when SW1 and bit12
in the User Option Bytes are set as shown to the right.
STM32373C-EVAL boot from System Memory when SW1 and bit12 in
the User Option Bytes are set as shown to the right.
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Figure 3) include:
Boot source
Doc ID 023566 Rev 1
to change jumper JP7 when performing a reset. This is
Bit12 in User
Option Bytes
Switch
configuration
X
0
1
UM1564