Delay Time For The User System Interface - Renesas HS7125EDB01H User Manual

Debugging mcu board, microcomputer development environment system superh family / sh7125 series
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3.6

Delay Time for the User System Interface

Since the _RES and NMI signals are connected to the user system via the logic on the EV-chip
unit, a delay time shown in table 3.1 will be generated until the signal is input from the user
system to the MCU.
Table 3.1 Delay Time for Signals via the EV-chip Unit
No.
Signal Name
1
_RES
2
NMI
Delay Time (ns)
20
10
49

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