Renesas SuperH HS7339KCU01HE Addendum
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Renesas SuperH HS7339KCU01HE Addendum

Renesas SuperH HS7339KCU01HE Addendum

E10a-usb emulator
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REJ10B0166-0100
SuperH
Family E10A-USB Emulator
Additional Document for User's Manual
Supplementary Information on Using the SH7339
Renesas Microcomputer Development Environment System
SuperH
Family
E10A-USB for SH7339 HS7339KCU01HE
Rev.1.00
Revision Date: Dec. 24, 2004

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Summary of Contents for Renesas SuperH HS7339KCU01HE

  • Page 1 REJ10B0166-0100 SuperH Family E10A-USB Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7339 Renesas Microcomputer Development Environment System SuperH Family E10A-USB for SH7339 HS7339KCU01HE Rev.1.00 Revision Date: Dec. 24, 2004...
  • Page 3 (iii) prevention against any malfunction or mishap. 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp.

  • Page 5: Table Of Contents

    Section 1 Connecting the Emulator with the User System ...1 Components of the Emulator ... 1 Connecting the Emulator with the User System ... 2 Installing the H-UDI Port Connector on the User System ... 3 Pin Assignments of the H-UDI Port Connector ... 3 Recommended Circuit between the H-UDI Port Connector and the MPU ...

  • Page 7: Section 1 Connecting The Emulator With The User System

    Section 1 Connecting the Emulator with the User System Components of the Emulator Table 1.1 lists the components of the emulator. Table 1.1 Components of the Emulator Classi- fication Component Hard- Emulator box ware User system interface cable User system interface cable USB cable Soft-...

  • Page 8: Connecting The Emulator With The User System

    Connecting the Emulator with the User System To connect the E10A-USB emulator (hereinafter referred to as the emulator), the H-UDI port connector must be installed on the user system to connect the user system interface cable. When designing the user system, refer to the recommended circuit between the H-UDI port connector and the MPU.

  • Page 9: Installing The H-Udi Port Connector On The User System

    Installing the H-UDI Port Connector on the User System Table 1.3 shows the recommended H-UDI port connectors for the emulator. Table 1.3 Recommended H-UDI Port Connectors Connector Type Number 36-pin connector DX10M-36S DX10M-36SE, DX10G1M-36SE 14-pin connector 2514-6002 Note: When designing the 36-pin connector layout on the user board, do not connect any components under the H-UDI connector.
  • Page 10 Input/ No. Signal Output AUDCK Output Output AUDATA0 Output AUDATA1 Output AUDATA2 AUDATA3 Output /AUDSYNC Output Output Input Notes: 1. Input to or output from the user system. 2. The slash (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected.
  • Page 11 Pin No. Signal /TRST /ASEBRKAK /RESETP (GND) UVCC 10, 12, and 13 Notes: 1. Input to or output from the user system. 2. The slash (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected.

  • Page 12: Recommended Circuit Between The H-Udi Port Connector And The Mpu

    Recommended Circuit between the H-UDI Port Connector and the 1.5.1 Recommended Circuit (36-Pin Type) Figure 1.3 shows a recommended circuit for connection between the H-UDI and AUD port connectors (36 pins) and the MPU when the emulator is in use. Notes: 1.
  • Page 13 12. For the AUDCK pin, guard the pattern between the H-UDI port connector and the MPU at GND level.
  • Page 14 When the circuit is connected as shown in figure 1.3, the switches of the emulator are set as SW2 = 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the Debugger Part of the SuperH Family E10A-USB Emulator User’s Manual.

  • Page 15: Recommended Circuit (14-Pin Type)

    1.5.2 Recommended Circuit (14-Pin Type) Figure 1.4 shows a recommended circuit for connection between the H-UDI and AUD port connectors (14 pins) and the MPU when the emulator is in use. Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector. The /ASEMD0 pin must be 0 when the emulator is connected and 1 when the emulator is not connected, respectively.
  • Page 16 When the circuit is connected as shown in figure 1.4, the switches of the emulator are set as SW2 = 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the Debugger Part of the SuperH Family E10A-USB Emulator User’s Manual.

  • Page 17: Section 2 Software Specifications When Using The Sh7339

    Section 2 Software Specifications when Using the SH7339 Differences between the SH7339 and the Emulator 1. When the emulator system is initiated, it initializes the general registers and part of the control registers as shown in table 2.1. The initial values of the actual SH7339 registers are undefined. When the emulator is initiated from the workspace, a value to be entered is saved in a session.
  • Page 18 3. Low-Power States (Sleep, Software Standby, Module Standby, and U Standby) For low-power consumption, the SH7339 has sleep, software standby, module standby, and U standby states. The sleep, software standby, and module standby states are switched using the SLEEP instruction. When the emulator is used, only the sleep state can be cleared with either the normal clearing function or with the [STOP] button, and a break will occur.
  • Page 19 8. Cache Operation during User Program Break When cache is enabled, the emulator accesses the memory by the following methods: At memory write: Writes through the cache, then writes to the memory. At memory read: Does not change the cache write mode that has been set. Therefore, when memory read or write is performed during user program break, the cache state will be changed.
  • Page 20 13. Memory Access during Break In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can be selected whether the TLB exception is controlled or the program jumps to the user exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss exception is enable] is selected, a “Communication Timeout error”...
  • Page 21 The internal I/O registers can be accessed from the [IO] window. However, note the following when accessing the SDMR register of the bus-state controller. Before accessing the SDMR register, specify addresses to be accessed in the I/O-register definition file (SH7339.IO) and then activate the HEW. After the I/O-register definition file is created, the MPU’s specifications may be changed.

  • Page 22: Specific Functions For The Emulator When Using The Sh7339

    Specific Functions for the Emulator when Using the SH7339 In the SH7339, a reset must be input when the emulator is activated. Do not use the activation method described in step 12 for section 3.11 in the Debugger Part of the SuperHTM Family E10A-USB Emulator User's Manual.

  • Page 23: Trace Functions

    Note: When U-RAM or X/Y-RAM is accessed from the P0 space, the I-bus must be selected, and when accessed from the P2 space, the L-bus must be selected. When cache fill cycle is acquired, the I-bus must be selected. Table 2.5 lists the combinations of conditions that can be set under Break Condition 1, 2, 3. Table 2.5 Dialog Boxes for Setting Break Conditions Type Address...
  • Page 24 Table 2.7 shows the type numbers that the AUD function can be used. Table 2.7 Type Number and AUD Function Type Number HS0005KCU01H HS0005KCU02H AUD Trace Functions: This function is operational when the AUD pin of the device is connected to the emulator. Table 2.8 shows the AUD trace acquisition mode that can be set in each trace function.
  • Page 25 To set the AUD trace acquisition mode, click the [Trace] window with the right mouse button and select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be set in the [AUD mode1] or [AUD mode2] group box in the [Trace mode] page of the [Acquisition] dialog box.
  • Page 26 (a) Branch Trace Function The branch source and destination addresses and their source lines are displayed. Branch trace can be acquired by selecting the [Branch trace] check box in the [AUD function] group box of the [Trace mode] page. The branch type can be selected in the [AUD Branch trace] page. Figure 2.2 [AUD Branch trace] Page (b) Window Trace Function Memory access in the specified range can be acquired by trace.
  • Page 27 Notes: 1. When the [L-bus] or [I(M)-bus] radio button is selected, the bus cycles listed below will be traced. The [I-bus] and [M-bus] radio buttons are only available when the [I(M)-bus] radio button has been selected. L-bus: A bus cycle on the L-bus generated by the CPU is acquired. A bus cycle is also acquired when the cache has been hit.
  • Page 28 A, and the Y-bus condition must be set in channel B. (c) Software Trace Function Note: This function can be supported with SHC/C++ compiler (manufactured by Renesas Technology Corp.; including OEM and bundle products) V7.0 or later.

  • Page 29: Notes On Using The Jtag (H-Udi) Clock (Tck) And Aud Clock (Audck)

    7. Do not use the AUD full-trace mode for the VIO function. 8. If a completion-type exception occurs during exception branch acquisition, the next address to the address in which an exception occurs is acquired. Internal Trace Function: This function is activated by selecting the [Internal trace] radio button in the [Trace type] group box of the [Trace mode] page.
  • Page 30 4. Conditions set at Break Condition 2 are disabled when an instruction to which a BREAKPOINT has been set is executed. Do not set a BREAKPOINT to an instruction in which Break Condition 2 is satisfied. 5. When execution resumes from the address where a BREAKPOINT is specified, single-step operation is performed at the address before execution resumes.

  • Page 31: Notes On Setting The [Break Condition] Dialog Box And The Breakcondition_ Set Command

    BREAKPOINT setting, the BREAKPOINT address remains unchanged. When a BREAKPOINT is satisfied with the modified address in the VP_MAP table, the cause of termination displayed in the status bar and the [Output] window is ILLEGAL INSTRUCTION, not BREAKPOINT. 13. If an address of a BREAKPOINT cannot be correctly set in the ROM or flash memory area, a mark will be displayed in the [BP] area of the address on the [Source] or [Disassembly] window by refreshing the [Memory] window, etc.

  • Page 32: Performance Measurement Function

    2.2.7 Performance Measurement Function The emulator supports the performance measurement function. 1. Setting the performance measurement conditions To set the performance measurement conditions, use the [Performance Analysis] dialog box and the PERFORMANCE_SET command. When any line on the [Performance Analysis] window is clicked with the right mouse button, the popup menu is displayed and the [Performance Analysis] dialog box is displayed by selecting [Setting].
  • Page 33 Figure 2.4 [Performance Analysis] Dialog Box (b) Measurement range One of the following ranges can be specified. This depends on the item selected for [Mode] in the [Performance Analysis] dialog box. 1. From the start to the end of the user program execution (When Normal Break is selected for [Mode]) 2.
  • Page 34 Notes: 1. When the second and third ranges are specified, execute the user program after the measurement start condition is set to Break Condition 1 (or Break Condition 2) and the measurement end condition to Break Condition 2 (or Break Condition 1). Step operation is not possible when Break condition 1->2 or Break condition 2->1 is selected for the PERFORMANCE_SET command or in [Mode] of the [Performance Analysis] dialog box.
  • Page 35 Table 2.10 Measurement Item Selected Name Disabled Elapsed time Number of execution states Branch instruction counts Number of execution instructions DSP-instruction execution counts Instruction/data conflict cycle Other conflict cycles than instruction/data Exception/interrupt counts Data-TLB miss cycle Instruction-TLB miss cycle Interrupt counts Number of BL=1 instructions Number of MD=1 instructions Instruction cache-miss counts...
  • Page 36 Table 2.10 Measurement Item (cont) Selected Name Cacheable area instruction access cycle Cacheable area data access cycle Access counts other than instruction/data Non-cacheable area access counts Non-cacheable area instruction access counts Non-cacheable area data access counts Cacheable area access counts Cacheable area instruction access counts Cacheable area data access counts Each measurement condition is also counted when conditions in table 2.11 are generated.

  • Page 37: Notes On U Standby State

    3. Initializing the measured result To initialize the measured result, select [Initialize] from the popup menu in the [Performance Analysis] window or specify INIT with the PERFORMANCE_ANALYSIS command. 2.2.8 Notes on U Standby State Controlling Vcc (main) in the U standby state clears settings for peripheral modules in the SH7339 in which the emulator uses for debugging.
  • Page 38 Figure 2.5 [Recovery Information] Page The following shows the procedures recovered from the U standby state. 1. In the software standby mode, when the /CA pin is asserted, the emulator enters the U standby state and the message box shown in figure 2.6 is displayed. To cancel the U standby state, be sure to end the message box before asserting /RESETP from the user system.
  • Page 39 3. Assert /RESETP and turn Vcc (main) on. 4. After the power has been stable, negate the /CA pin. 5. Negate /RESETP, and the U standby state is cancelled. 6. Before the program execution is restarted from the reset vector, the E10A-USB debugging function, which has been set in the [Recovery Information] page in the [Configuration] dialog box, is recovered.
  • Page 41 Supplementary Information on Using the SH7339 Publication Date: Rev.1.00, December 24, 2004 Published by: Sales Strategic Planning Div. Renesas Technology Corp. Edited by: Technical Documentation & Information Department Renesas Kodaira Semiconductor Co., Ltd. 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
  • Page 42 Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
  • Page 43 SuperH Family E10A-USB Emulator Additional Document for User’s Manual...

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