Revision History; Table 66; Table 49. Adc Clock Frequency - STMicroelectronics STM32L151CB Manual

Revision history

9 Revision history
on

Table 66.

Date
02-Jul-2010
01-Oct-2010
16-Dec-2010
25-Feb-2011
106/109
Document revision history
Revision
1 Initial release.
Removed 5 V tolerance (FT) from PA3, PB0 and PC3 in
STM32L15xxx pin definitions on page 30
Updated
characteristics on page 46
2
Updated
Added Table 49: ADC clock frequency on page 84
Updated
Modified consumptions on page 1 and in
modes on page 13
3 LED_SEG8 removed on PB6
Updated
VFQFPN48 replaced by UFQFPN48
Features: updated value of Low-power sleep.
Section 3.3.2: Power supply
Table 4: STM32L15xxx pin
reset) and alternate function for OSC_IN and OSC_OUT pins; modified
footnote 5; added footnote to OSC32_IN and OSC32_OUT pins; C1
and D1 removed on PD0 and PD1 pins (TFBGA64 column).
Section 3.11: DAC (digital-to-analog
Table 6: Voltage characteristics on page
regarding I
Table 7: Current characteristics on page
regarding positive and negative injection.
Table 11: Embedded reset and power control block characteristics on
page 46: updated typ and max values for T
enabled).
Table 13: Current consumption in Run mode, code with data
4
processing running from Flash on page
clock source (16 MHz), Range 3.
Table 14: Current consumption in Run mode, code with data
processing running from RAM on page
clock source (16 MHz), Range 3.
Table 15: Current consumption in Sleep mode on page
values for HSI clock source (16 MHz), Range 3 for both RAM and
Flash; changed units.
Table 16: Current consumption in Low power run mode on page
updated parameter and max value of I
Table 17: Current consumption in Low power sleep mode on page
updated symbol, parameter, and max value of I
Table 18: Typical and maximum current consumptions in Stop
updated values for I
clock (32.768 kHz), regulator in LP mode, HSI and HSE OFF (no
independent watchdog).
Doc ID 17659 Rev 6
Changes
Table 11: Embedded reset and power control block
Table 12: Embedded internal reference voltage on page 48
Table 50: ADC characteristics on page 84
Section 6: Electrical characteristics on page 41
supervisor: updated note.
definitions: modified main function (after
.
INJ(PIN)
DD (Stop with RTC)
STM32L151xx, STM32L152xx
Table 4:
Section 3.1: Low power
converter): updated bullet list.
43: updated footnote 3
43: updated footnote 4
(V rising, BOR
RSTTEMPO DD
49: removed values for HSI
50: removed values for HSI
51: removed
Max (LP Run).
DD
Max (LP Sleep).
DD
- RTC clocked by LSE external
52:
53:
mode: