STM32L151xx, STM32L152xx
Figure 19. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
Table
41. Otherwise the reset will not be taken into account by the device.
6.3.14
TIM timer characteristics
The parameters given in the following table are guaranteed by design.
Refer to
alternate function characteristics (output compare, input capture, external clock, PWM
output).
Table 42.
Symbol
t
res(TIM)
f
EXT
Res
TIM
t
COUNTER
t
MAX_COUNT
1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.
Section 6.3.11: I/O current injection characteristics
(1)
TIMx
characteristics
Parameter
Timer resolution time
Timer external clock
frequency on CH1 to CH4
Timer resolution
16-bit counter clock period
when internal clock is
selected (timer's prescaler
disabled)
Maximum possible count
Conditions
f
= 32 MHz
TIMxCLK
f
= 32 MHz
TIMxCLK
f
= 32 MHz 0.0312
TIMxCLK
f
= 32 MHz
TIMxCLK
Doc ID 17659 Rev 6
Electrical characteristics
max level specified in
IL(NRST)
for details on the input/output
Min
Max
1
31.25
f
/2
0
TIMxCLK
0
16
16
1
65536
2048
65536 × 65536
134.2
Unit
t
TIMxCLK
ns
MHz
MHz
bit
t
TIMxCLK
µs
t
TIMxCLK
s
77/109
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