Table 3-14. Rtest Encodings; Refresh/Scrub Address Register - Motorola MTX Series Programmer's Reference Manual

Note
rtest0,rtest1,rtest2
%000
%001
%010
%011
%100
%101
%110
%111

Refresh/Scrub Address Register

Address
Bit
Name
Operation
Reset
ROW ADDRESS These bits form the row address counter used by the
refresher/scrubber for all blocks of DRAM. The row address counter
increments by one after each refresh/scrub cycle. When it reaches all 1s, it
rolls back over to all 0s and continues counting. ROW ADDRESS is
readable and writable for test purposes.
Note
http://www.motorola.com/computer/literature
These test modes are not intended to be used once the chip is in a
system.

Table 3-14. rtest encodings

Test Mode selected
Normal Counter Operation
RA counts at 16x
RA counts at 256x
RA is always at roll value for CA
CA counts at 16x
CA counts at 256x
reserved
reserved
$FEF80048
ROW ADDRESS
READ/WRITE
0 P
Within each block, the most significant bits of ROW ADDRESS
are used only when their DRAM devices are large enough to
require them.
Programming Model
COL ADDRESS
READ/WRITE
0 P
3-45
3