External Source Destination Registers - Motorola MTX Series Programmer's Reference Manual
Mtxa/pg4
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Raven PCI Host Bridge & Multi-Processor Interrupt Controller
2
External Source Destination Registers
Offset
Bit
Name
Operation
Reset
2-70
VECTOR This vector is returned when the Interrupt Acknowledge
register is examined upon acknowledgement of the interrupt associated
with this vector.
Int Src 2 -> Int Src 15 - $10030 -> $101F0
3
3
2
2
2
2
2
2
2
1
0
9
8
7
6
5
4
3
EXTERNAL SOURCE DESTINATION
R
$00
This register indicates the possible destinations for the external interrupt
sources. These interrupts operate in the Distributed interrupt delivery
mode.
P1 PROCESSOR 1. The interrupt is pointed to processor 1.
P0 PROCESSOR 0. The interrupt is pointed to processor 0.
Int Src 0 - $10010
2
2
2
1
1
1
1
1
1
2
1
0
9
8
7
6
5
4
R
$00
Computer Group Literature Center Web Site
1
1
1
1
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
R
$00
$00
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