Draft Document for Review October 18, 2004
9406 Model 825 Processor and Memory
Note: DIMM quad plugging is J1A, J3A, J0A, J2A, and then J1C, J3C, J0C, J2C
Note: You can find line cord and power receptacle specification information on
the Web at:
http://www.ibm.com/eserver/iseries/infocenter
High-speed link on Model 825
The Model 825 supports up to three HSL loops, two of which can be optical fiber
HSL loops. The optical fiber HSL loop extends the distance between the Model
825 system unit and the I/O units from a limit of 15 meters prior to V5R2, to a
maximum of 250 meters. The extra length can help to improve data reliability and
protection. See "High-speed link" on page 293 for information about supported
HSL cables and HSL loop maximums.
You can find further information in High-speed Link Loop Architecture for the IBM
Eserver iSeries Server: OS/400 Version 5 Release 2, REDP-3652, and the
HSL Rules presentation, which is available on the Web at:
http://www-1.ibm.com/servers/eserver/iseries/ha/systemdesign.html
L3 Cache
Processor
DIMM Sockets (8X)
SMI
SMI
SMI
SMI
iSeries Model 825
5486M825.fm
J2A
J2C
J0A
J0C
J3C
J3A
J1C
J1A
213
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