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A
S
BOUT THE
ERVER
[1.3.195] GPIO List (Continued)
I
P
#
P
N
TEM
IN
IN
AME
15
K38
OC7_N_GPIO14
16
E30
GPIO15
17
H22
SATA4GP_GPIO16
18
AV21
TACH0_GPIO17
IO
P
OWER
PU/PD
R
ECOMMENDATIONS
TYPE
WELL
(
REFERENCE DESIGN
"In Suspend Power Well.
Muxed with OC7#.
Defaults to OC7#. If not
I
P3V3_AUX
PU
used, require a weak pull-
up (8.2kohm to 10kohm) to
Vcc3_3"
"In Suspend Power Well.
O
P3V3_AUX
NA
Unmuxed. Defaults to
GPO. "
"In Main Power Well.
Muxed with SATA4GP.
Defaults to GPI. If not
I
P1V1_SSB
PU
used, require a weak pull-
up (8.2kohm to 10kohm) to
Vcc3_3"
"In Main Power Well.
Muxed with TACH0.
Defaults to GPI. If not
I
P1V1_SSB
PU
used, require a weak pull-
up (8.2kohm to 10kohm) to
Vcc3_3"
V
A
ENDOR
LTERNATE
U
SED
FUNCTION
FUNCTION
)
(D
)
EFAULT
OC7_N
GPI
(GPI)
GPIO15
GPO
(GPO)
SATA4GP
GPI
(GPI)
TACH0
GPI
(GPI)
1-61
N
STATE
ET
NET
AFTER
CONNECT
NAME
RESET
TO
pull up
P3V3_A
UX via
10Kohm
and con-
PU_USB_
P3V3
high
nect to
OC7_N
_AUX
FM_ERR
2_N via
0ohm
(EMPTY)
resistor
connect
to pin 3
of JP3
(RAID
FM_SSB_
Key con-
SAS_SAT
nector)
P3V3
N/A
A_RAID_K
via
_AUX
EY
33.2ohm,
pull
2.21k to
P3V3_A
UX
pull up
P3V3 via
FM_THRO
10Kohm,
high
P3V3
TTLE_N
and con-
nect to
CPU
PU to
P3V3 via
BOARD_S
high
10K and
KU0
PD via
10K (NI)
GPIO L
IST
Upgrad
e KEY
THROT
TLE
board
SKU ID
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