QUANTA W Mainboard Series S210-MBT2W Technical Manual page 21

[0.3.155] SDR [0.3.156] Sensor Data Record
[0.3.157] SEEP [0.3.158] Serial Electrically Erasable Programmable
ROM Read-Only Memory
[0.3.159] SEL [0.3.160] System Event Log
[0.3.161] SERR [0.3.162] System Error
[0.3.164] A two-wire interface based on the I
col. The SMBus is a low-speed bus that provides
[0.3.163] SMBus
positive addressing for devices, as well as bus arbi-
tration
[0.3.166] Server Management Interrupt. SMI is the
[0.3.165] SMI
highest priority non-maskable interrupt
[0.3.167] SMM [0.3.168] Server Management Mode
[0.3.169] SMS [0.3.170] Server Management Software
[0.3.171] SNMP [0.3.172] Simple Network Management Protocol
[0.3.173] SOL [0.3.174] Serial Over LAN
[0.3.176] Universal Asynchronous Receiver/Trans-
[0.3.175] UART
mitter
[0.3.177] UCT [0.3.178] Upper Critical Threshold
[0.3.179] UDP [0.3.180] User Datagram Protocol
[0.3.181] UNCT [0.3.182] Upper Non-Critical Threshold
[0.3.183] UNRT [0.3.184] Upper Non-Recoverable Threshold
[0.3.185] WDT [0.3.186] Watchdog Timer
[0.3.187] Word [0.3.188] 16-bit quantity
2
C proto-
XX
A
CRONYMS