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Chapter 19 Timebase Timer
3.Configuration
3. Configuration
Timebase timer
Timebase counter
(26-bit counter)
0
1
2
3
Base clock
1
2
3
4
2
2
2
2
(φ)
Timer clear
CTBR
CTBR
Clears the counter
after writing "A5h"
and then "5Ah."
264
Figure 3-1 Configuration
Timebase timer
TBC2-TBC0
0
1
0
1
1
1
1
1
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
10
11
12
13
14
15
16
17
18
19
2
2
2
2
2
2
2
2
2
2
2
Figure 3-2 List of Registers
Interval time
TBCR:bit 5 -3
φ x
0
0
2
11
φ x
2
12
0
1
φ x
1
0
2
13
φ x
2
22
1
1
φ x
2
23
0
0
φ x
0
0
1
2
24
φ x
25
1
0
2
φ x
2
26
1
1
20
21
22
23
24
25
26
2
2
2
2
2
2
TBIE
TBCR:bit 6
0
Interrupt disable
1
Interrupt enable
0
0
TBIF
TBIF
TBCR:bit 7
Timebase
0
Without interrupt request
Timer interrupt
1
1
With interrupt request
(#46)
WRITE; 0: Flag clear
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